DATAMATH CALCULATOR MUSEUM
Texas Instruments TI-Nspire ViewScreen Panel
|Date of introduction:
|LCD dot matrix
|$280.00 (SRP 2008)
|240 * 320 pixel
| 10.0" x 9.7" x
254 x 247 x 38 mm3
|26.3 ounces, 742 grams
|Date of manufacture:
|mth 07 year 2007 (A)
|Origin of manufacture:
| CPU: TI-OMAP NP31AZZG
Flash: SST 39VF400A, ST NAND256W3A
TI ViewScreen panel connects with a cable to the Texas Instruments Graphing
the panel on the overhead projector enlarges the image of the handheld screen so
that each student can follow along. Don't miss the US Patent Application U.S. Pat. No. 5,168,294 with the title “Display demonstration system for providing enlarged projected image of calculator display”
filed already in September 27, 1991.
The TI ViewScreen TI-Nspire was introduced in July 2007 and connects to the TI-Nspire and TI-Nspire CAS. It was delivered either as the ViewScreen panel package with the power supply and a carrying case or as part of the ViewScreen system including the Graphing calculator. The first generation of the TI-85 VSC was permanently connected to a much smaller ViewScreen panel.
In 2008 four different ViewScreen panels were available for TI's Graphing calculators:
|• Panel 1:
TI-73 VSC, TI-73 Explorer VSC,
TI-82 VSC, TI-83 VSC,
TI-83 Plus VSC, TI-83 Plus Silver Edition VSC, TI-84 Plus VSC,
TI-84 Plus Silver Edition VSC
• Panel 2: TI-89 VSC, TI-89 Titanium VSC, TI-92, TI-92 Plus, Voyage 200
• Panel 3: TI-85 VSC (2nd design), TI-86 VSC
• Panel 4: TI-Nspire, TI-Nspire CAS, TI-Nspire Touchpad, TI-Nspire CAS Touchpad
Dismantling this TI-Nspire ViewScreen Panel with
Date code S-0707A manufactured in July 2007 by
Inventec Shanghai in China
reveals an internal design almost identical to the the
Phoenix 1 prototype based on the sophisticated POMAP1509E architecture
preceding the final TI-Nspire and TI-Nspire CAS. Learn more about the
Hardware Architecture of TI’s Graphing Calculators.
Processor: The OMAP™ processor of the TI-Nspire ViewScreen Panel is labeled TI-OMAP NP31AZZG. We assume that this tiny chip is actually a System-on-Chip based on the OMAP5912 architecture from Texas Instruments hosting a ARM9 32-bit RISC processor clocked at 78 MHz and a TMS320C55xx Digital Signal Processor core.
Memory: The TI-Nspire ViewScreen Panel makes use of three (two located on the backside of the PCB) different memory chips:
• NAND Flash-ROM
The NOR Flash-ROM was invented by Toshiba in 1984 and found its way immediately as a replacement of the more expensive ROM (NRE mask costs) and EEPROM (device costs) memory. The NOR Flash-ROMs use an address and data bus to allow the random access to any memory location. Main disadvantages of the NOR Flash-ROM compared to the NAND Flash-ROM are the higher costs, larger housings and slower write speeds.
The disassembled TI-Nspire ViewScreen Panel (Manufactured
July 2007) makes use of one SST
39VF400A, manufactured by Silicon Storage Technology,
Inc. with a 256k*16 bits organization.
The NAND Flash-ROM architecture was introduced by Toshiba in 1989 and is based on pages of typically 512 to 2048 Bytes and blocks of typical 32 or 64 pages.
While programming is performed on a page basis, erasure can only be performed on a block basis. NAND Flash-ROMs requires bad block management to be performed by device driver software or hardware. Due to the missing address bus the NAND Flash-ROM chip doesn't allow random access to the individual memory positions and therefore it can't be used for program memory of a microprocessor. Typical use of the NAND Flash-ROM is file based mass-memory storage such as memory cards.
The disassembled TI-Nspire ViewScreen Panel makes use of one ST NAND256W3A NAND Flash-ROM with 32M Bytes.
SDRAM is the abbreviation of synchronous dynamic random access memory and is used as program and data memory for microprocessor systems. Each bit of data in a SDRAM is stored in separate capacitor on the integrated circuit. Since these capacitors leak charge over time, the information eventually fades unless the capacitor charge is refreshed periodically.
Because of this refresh requirement, it is a dynamic memory as opposed to SRAM and other static memory. Its advantage over SRAM is its structural simplicity: only one transistor and a capacitor are required per bit, compared to six transistors in SRAM. This allows SDRAM to reach very high density at low cost. Since SDRAM loses its data when the power supply is removed, it is accompanied usually by a NOR Flash-ROM.
During power-up of the system the program content of the NOR Flash-ROM is simply copied into the SDRAM and executed from there. We assume that the TI-Nspire uses the SDRAM as workspace for user data but stores changes on them into the NAND Flash-ROM.
The disassembled TI-Nspire ViewScreen Panel makes use of one Infinion HYB18L256160 SDRAM with 16M*16 bits size.
Please notice that all three memory chips are almost identical with the parts located in the released TI-Nspire CAS with an April 2007 manufacturing date. The only difference is the supply voltage, it was lowered from 3.3 volts to 1.8 volts.
Display: The TI-Nspire ViewScreen Panel uses a transmissive high-contrast display with a resolution of 240 * 320 pixels, a huge improvement over the TI-89 Titanium with 100 * 160 pixels or the Voyage 200 with 128 * 240 pixels. The large 16-level grey-scale display includes a novel split screen capability with up to 4 views.
The driver circuit of the LC-Display is compromised of 2 column driver and one row driver manufactured by Novatek, Taiwan. We couldn't locate the bare chips mounted on a flexible piece of circuit board attached between the display and the PCB.
If you have additions to the above article please email: firstname.lastname@example.org.
© Joerg Woerner, August 9, 2020. No reprints without written permission.