DATAMATH CALCULATOR MUSEUM
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DATAMATH CALCULATOR MUSEUM |
Texas Instruments TI-Nspire COLOR (Prototype)
| Date of introduction: | Never | Display technology: | LCD dot matrix 16-bit color, backlit |
| New price: | Display size: | 240 * 320 pixels | |
| Size: | 7.5" x 3.4" x 0.60" 190 x 87 x 15 mm3 |
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| Weight: | 7.6 ounces, 216 grams | Serial No: | |
| Batteries: | 3.7L1060SP Li-Ion | Date of manufacture: | mth 08 year 2010 |
| AC-Adapter: | Origin of manufacture: | China | |
| Precision: | 14 | Integrated circuits: | CPU: ET-NS2010A-0
(T6UJ1XBG-0001) SDRAM and Flash MCP: Micron MT29C1G56MAUZAJC Flash-ROM: Macronix MX29SL402 |
| Memories: | |||
| Program steps: | 32M Bytes, 100M Bytes Flash ROM | Courtesy of: | Texas Instruments |
Texas
Instruments introduced at the 2011 T3 International Conference held on February
25-27 in San Antonio, TX with the TI-Nspire CX and
TI-Nspire CX CAS their first graphing
calculators with full color, backlit displays.
This TI-Nspire COLOR was one of
the prototypes to test the design in the field.
Dismantling
this TI-Nspire COLOR prototype manufactured already in August 2010 in China reveals a
very compact design based on only two printed circuit boards (PCBs) with just a
few main Integrated Circuits.
Processor:
The ARM9 CPU is integrated into an ASIC with the markings ET-NS2010A-0
(T6UJ1XBG-0001), obviously from Toshiba, Japan. The ARM9 core is clocked with
132 MHz compared to the 90 MHz of the previous TI-Nspire. Learn more about the Hardware Architecture of TI’s Graphing Calculators.
Please notice that the later TI-Nspire CX and CX CAS use an ASIC
with the markings ET-ET2010B-0 (T6UJ1XBG-0002).
Memory:
Both the NAND Flash-ROM with a capacity of
128M Bytes and the SDRAM with a capacity of
16M x 16 Bits are integrated into a Multichip Package (MCP) with the part designation Micron
JW378. Using Micron's part number decoder expands the JW378 code to
MT29C1G56MAUZAJC-75 and the MCP Part Numbering System explains:
| • 29C: NAND Flash-ROM + LPDRAM • 1G: 1G Bits Flash density • 56M: 256M Bits LPDRAM density • A: 1.8V Operating Voltage • U: Second generation Flash memory, 128M x 8 Bits • Z: First generation LPDRAM memory, 16M x 16 Bits • A: Chip count 1 NAND Flash-ROM, 1 LPDRAM • JC: Package Code • -75: 135 MHz Clock |
In
addition to this impressive Multichip Package we located on the backside of the
PCB an additional Macronix MX29SL402
NOR Flash-ROM with a capacity of 512k
Bytes. It is used for the first-stage bootloader ("Boot 1") and was integrated
with the later TI-Nspire CX and CX CAS into the ASIC before it re-appeared with
hardware Revision NSC CR IV of the TI-Nspire
CX
family.
ROM-Versions:
• TI-Nspire COLOR (Prototype)
