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Texas Instruments TI-Nspire KBD EZ-Spot

Date of introduction:  July 2007 Display technology:  LCD dot matrix
 16-level greyscale
New price:   Display size:  240 * 320 pixels 
Size:  7.9" x 3.9" x 0.85"
 200 x 100 x 22 mm3
   
Weight:  9.9 ounces, 282 grams Serial No:  2016076608 (Base Unit)
 2011057389 (Alpha KBD)
Batteries:  4*AAA Date of manufacture:  mth 05 year 2007
AC-Adapter:   Origin of manufacture:  China (S)
Precision:  14 Integrated circuits:  CPU: TI-NS2006A (L9A0702)
 SDRAM: HYB18L256160
 Flash: SST 39WF400A, ST NAND256R3A
 Display: Novatek NT7702H, 2*xxx
Memories:      
Program steps:  20M Bytes, 16M Bytes Flash ROM Courtesy of:  Joerg Woerner 

TI-Nspire_K_Y_Base.jpg (132266 Byte)To reduce theft of this new school-owned TI-Nspire calculator, Texas Instruments introduced in 2007 the EZ-Spot Teacher Packs with a bright, easy-to-spot, "school bus yellow" back cover and slide case. 

In addition, each unit's faceplate is inscribed with the words, "SCHOOL PROPERTY."

Dismantling this TI-Nspire EZ-Spot with the TI-84 Plus EZ-Spot Keypad reveals no surprises, it is identical with a TI-Nspire manufactured in the same month.

Architecture: Dismantling the TI-Nspire reveals a modern architecture based on the ZEVIO architecture introduced by LSI Logic early in 2006. The ZEVIO architecture is ideally suited for consumer electronics products such as GPS navigation systems, electronic toys and edutainment applications, personal media players, and handheld products. The System-on-Chip (SoC) approach of the ZEVIO is centered around Intellectual Property blocks from ARM (e.g. the 90 MHz ARM9 32-bit RISC processor), LSI Logic's 200-MHz 16-bit ZSP-400 Digital Signal Processor, 16-bit SDRAM memory controller, NAND flash memory controller, USB-2.0 (including USB On the Go), IEEE 1394 Firewire, and Secure Digital I/O and a LCD controller for TFT displays. We noticed this approach already with the PLT-SHH1 prototype based on the sophisticated POMAP1509E, a design based on the OMAP™1510 series dual-core processor. Learn more about the Hardware Architecture of TI’s Graphing Calculators.

Processor: The current (May 2007) chips with the TI-NS2006A-0 / L9A0702 identification are designed in a 0.13um process and manufactured in any of LSI Logic's foundries, which include Semiconductor Manufacturing International, Taiwan Semiconductor Manufacturing and United Microelectronics.

Memory: The TI-Nspire makes use of three different memory chips:

NOR Flash-ROM
NAND Flash-ROM
SDRAM



Flash memory is non-volatile and does not need a battery to maintain the information stored in the chip. In the past years two different technologies emerged in parallel with some advantages and disadvantages.

The NOR Flash-ROM was invented by Toshiba in 1984 and found its way immediately as a replacement of the more expensive ROM (NRE mask costs) and EEPROM (device costs) memory. The NOR Flash-ROMs use an address and data bus to allow the random access to any memory location. Main disadvantages of the NOR Flash-ROM compared to the NAND Flash-ROM are the higher costs, larger housings and slower write speeds.

The disassembled TI-Nspire (Manufactured May 2007) makes use of one SST 39WF400A, manufactured by Silicon Storage Technology, Inc. with a 256k*16 bits organization. Please keep in mind that even the TI-89 Titanium used 2M*16 bits Flash-ROM.

The NAND Flash-ROM architecture was introduced by Toshiba in 1989 and is based on pages of typically 512 to 2048 Bytes and blocks of typical 32 or 64 pages.

While programming is performed on a page basis, erasure can only be performed on a block basis. NAND Flash-ROM's requires bad block management to be performed by device driver software or hardware. Due to the missing address bus the NAND Flash-ROM chip doesn't allow random access to the individual memory positions and therefore it can't be used for program memory of a microprocessor. Typical use of the NAND Flash-ROM memory is file based mass-memory storage such as memory cards.

The disassembled TI-Nspire makes use of one ST NAND256R3A NAND Flash-ROM with 32M Bytes capacity compared with 8M Bytes CMOS NAND EEPROM located in the PLT-SHH1 prototype.

SDRAM is the abbreviation of synchronous dynamic random access memory and is used as program and data memory for microprocessor systems. Each bit of data in a SDRAM is stored in separate capaicitor on the integrated circuit. Since these capacitors leak charge over time, the information eventually fades unless the capacitor charge is refreshed periodically.

Because of this refresh requirement, it is a dynamic memory as opposed to SRAM and other static memory. Its advantage over SRAM is its structural simplicity: only one transistor and a capacitor are required per bit, compared to six transistors in SRAM. This allows SDRAM to reach very high density at low cost. Since SDRAM loses its data when the power supply is removed, it is accompanied usually by a NOR Flash-ROM.

During power-up of the system the program content of the NOR Flash-ROM is simply copied into the SDRAM and executed from there. We assume that the TI-Nspire uses the SDRAM as workspace for user data but stores changes on them into the NAND Flash-ROM.

The disassembled TI-Nspire makes use of one Qimonda HYB18L256160 SDRAM with 16M*16 bits capacity compared with 8M*16 bits SDRAM located in the PLT-SHH1 prototype.

Display: The TI-Nspire uses a high-contrast display with a resolution of 240 * 320 pixels, a huge improvement over the TI-89 Titanium with 100 * 160 pixels or the Voyage 200 with 128 * 240 pixels. The large 16-level greyscale display includes a novel split screen capability with up to 4 views.



TI-Nspire_Y_K_S0507_V254MP.jpg (141603 Byte)Texas Instruments announced on March 8, 2010 the new TI-Nspire Touchpad and Operating System 2.0. The new OS 2.0, including the TI-84 Plus Silver Edition 2.54MP, was released for this TI-Nspire with Clickpad, too.

ROM-Versions:

TI-Nspire

1.1.9253 (May 21, 2007)  
Boot1 Code Version: 1.1.8916
Boot2 Code Version: 1.1.8981
TI-84 Plus Silver Edition 2.42

1.2.2398 (August 26, 2007)
TI-84 Plus Silver Edition 2.44

TI-Nspire_V13_OS.jpg (85490 Byte)1.3.2438 (January 8, 2008)
TI-84 Plus Silver Edition 2.46

TI-Nspire_V14_OS.jpg (102455 Byte)1.4.11653 (July 9, 2008)
TI-84 Plus Silver Edition 2.46
Boot1 Code Version: 1.1.8916
Boot2 Code Version: 1.4.1571

TI-Nspire_Y_K_S0507_OS.jpg (86719 Byte)TI-Nspire_Y_S0507_OS.jpg (91774 Byte)1.6.4379 (November 3, 2008, released December 9, 2008)
TI-84 Plus Silver Edition 2.46

1.7.2741 (May 19, 2009, released June 6, 2009)
TI-84 Plus Silver Edition 2.48

TI-Nspire_Y_S0507_V20_OS.jpg (149603 Byte)2.0.0.1188 (March 5, 2010)
TI-84 Plus Silver Edition 2.54MP

2.1.0.631 (July 17, 2010)
TI-84 Plus Silver Edition 2.54MP

3.0.1.1753 (April 2011)
TI-84 Plus Silver Edition 2.54MP

3.0.2.1791 (May 2011)
TI-84 Plus Silver Edition 2.54MP


You can check the ROM version of your TI-Nspire using the following key sequence and reading the number on your screen:

[HOME] [8] [4] (1.1 ... 1.6) OR
[HOME] [8] [5] (1.7) OR
[HOME] [5] [4] (2.0 ... 3.0)

Information provided by Xavier Andréani. 

While using the TI-84 keyboard you can check the ROM version of your TI-Nspire using the following key sequence and reading the number on your screen:

[2nd] [MEM] [1]

TI-Nspire Computer Link Software for Windows

1.1.9182

1.2.2412 (December 21, 2007)

1.3.2439 (Trial: January 8, 2008)


Exam acceptance:

Since the TI-Nspire EZ-Spot lacks a QWERTY keyboard it is permitted (as of September 27, 2007) for use on SAT, ACT, PSAT and AP exams.

Super-sized images:

Please request per email.

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If you have additions to the above article please email: joerg@datamath.org.

© Joerg Woerner, June 24, 2008. No reprints without written permission.