DATAMATH CALCULATOR MUSEUM |
Additional Pictures
The backside
of the TI-Nspire+ prototype looks almost identical to the released TI-Nspire.
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Changing the 4 AAA-sized
batteries of the TI-Nspire+
needs the keyboard to be removed.
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The internal
construction of the TI-Nspire+ makes use of just 2 printed circuit boards
(PCBs), one for the gray-scale LC-Display and power supply and another one for the computing unit.
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The frontside of the
PCBs reveal the construction of the 240 * 320 pixel gray-scale LC-Display, the TI-OMAP and a total of three different memory chips.
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The brain of the
TI-Nspire+ prototype is actually a System-on-Chip based on the OMAP architecture from Texas Instruments. We assume that the tiny housing hosts a 78 MHz ARM9 32-bit RISC processor.
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The TI-Nspire+ uses three
different memory chips, a 256k*16 NOR Flash-ROM, 32M Bytes
NAND Flash-ROM, and 16M*16 SDRAM. The clock frequency of the SoC is 12 MHz.
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Additional Zoom-Images -
NOR Flash-ROM:
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Additional Zoom-Images -
SDRAM:
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Additional
Zoom-Images - NAND Flash-ROM:
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The 320 *
240 pixel gray-scale LC-Display needs a total of three drivers. We located this Novatek NT7702 row-driver and two unidentified column-drivers.
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If you have additions to the above article please email: joerg@datamath.org.
© Joerg Woerner, August 26, 2018. No reprints without written permission.